The present invention relates to a power output stage circuit having an automatically controlled pulse-width modulation generator and an upstream closed-loop control circuit. The upstream closed-loop control circuit switches the pulse-width modulation generator and the power output stage to a permanently open state, to a PWM mode having pulse-width modulated pulses, and to a permanently closed state as a function of a preset external setpoint, an actual value of the power output stage, and a reference voltage derived from the supply voltage.
With a conventional power output circuit, there is the danger of the power output stage no longer being accurately clocked shortly before the transition from PWM mode to permanently closed mode. This is especially true when the interpulse periods at the threshold of the PWM zone take on approximately the same duration as the switching edges of the control signal pulses. This results in incomplete switching of the power output stage, which increases the power loss in the power output stage. The cooling system for the power output stage must therefore be designed for this increased power loss. In addition, the imprecise clocking of the output stage increases the EMC value, as a result of the bursts that occur. Moreover, the pulse packets produce audible low-frequency oscillations.
An object of the present invention is to provide a power output circuit which avoids an increased power loss and high EMC value, particularly at the transition from PWM mode to a permanently closed power output stage. It is also possible to reduce the costs of cooling the power output stage using the power output circuit according to the present invention.
The power output circuit according to the present invention achieves this object by prematurely switching from PWM mode to permanently closed mode as a function of a preset setpoint and the supply voltage and then returning to PWM mode with a hysteresis of these values.
The early transition from PWM mode to permanently closed mode and the return from permanently closed mode to PWM mode via a hysteresis avoids the threshold having short periods that is critical for the increase in power loss and elevated EMC value.
The early transition can be very easily initiated by supplying the closed-loop control circuit with an additional bias voltage which, in conjunction with a preset setpoint that is smaller than the setpoint producing the maximum pulse width by a specific amount, abruptly and prematurely switches the pulse-width modulation generator and the power output stage to the permanently closed state.
When it reaches the value defined by the additional bias voltage, the setpoint causes the closed-loop control circuit to abruptly switch the pulse modulation generator and the power output stage to the permanently closed state even before the maximum setpoint is reached. This reliably avoids voltage peaks in the output voltage of the power output stage which result in a higher power loss. It also maintains a low EMC value, making it possible to reduce cooling costs, since the power loss and therefore the heat to be dissipated in the power output stage did not increase during this transition to full load, i.e. to the permanently closed state.
According to one embodiment of the present invention, the point at which early switching to the permanently closed state occurs is defined so that the preset setpoint corresponds to a pulse width of 95% of the maximum pulse width (period). Steps are taken, in particular, to reduce, compared to the period, the pulse width obtained with the preset setpoint by a duration that is longer than the times of the pulse switching edges in PWM mode.
According to another embodiment of the present invention, the power output circuit is designed so that the closed-loop control circuit has a voltage regulator whose non-inverting control input is supplied with the reference voltage and whose inverting control input is supplied with the setpoint via a resistor and the output voltage of the power output stage via another resistor as the actual value; the voltage regulator emits a control voltage which increases as the setpoint rises. The pulse-width modulation generator has a saw-tooth voltage generator whose output voltage varies periodically between a is lower and upper voltage limit. When the control voltage is less than the lower voltage limit, the pulse-width modulation generator does not send a control signal to the power output stage. When the control voltage is greater than the lower voltage limit but less than the upper voltage limit, the pulse-width modulation generator switches the power output stage to a PWM mode having a increasing pulse width as the setpoint rises. When the control voltage is greater than the upper voltage limit, the pulse-width modulation generator switches the power output stage to the permanently closed state so that it can detect all operating states. In doing this, the abrupt, early transition to the permanently closed state can be easily achieved by supplying the additional bias voltage to the non-inverting control input, by supplying the setpoint to the inverting input of a compensating stage by switching the output potential of the compensating stage from frame potential to positive potential when the preset setpoint corresponds to the bias voltage, by connecting the output of the compensating stage to the non-inverting control input of the voltage regulator via a decoupling diode, and by the fact that the output potential of the compensating stage produces a sudden voltage change at the non-inverting control input of the voltage regulator, resulting in a sudden voltage change for increasing the control voltage and switching the pulse-width modulation generator and the power output stage to the permanently closed state.
The present invention provides an exemplary embodiment of a particular circuit layout. The comparators or operational amplifiers used in the voltage regulator and in the compensating stage can also be controlled in reverse, and the sudden voltage change can also be implemented in the setpoint. The other control operation can act on the output of the voltage regulator so that the control voltage decreases as the setpoint increases. In this case, the pulse width of the control signal reaches is maximum value when the control voltage approaches the lower saw-tooth voltage generator value, and the transition to the permanently closed state occurs when the control voltage drops below the lower voltage limit of the saw-tooth voltage generator. Depending on how the control voltages are laid out and applied to the comparators or operational amplifiers, it may be necessary to reverse the polarity of the decoupling diode.
If the output of the compensating stage is connected via a resistor to the non-inverting control input of the same compensating stage, thereby reducing the bias voltage, which is more or less equivalent to a setpoint that is around 92% of the maximum setpoint, this will achieve a switching hysteresis for early switching to the permanently closed state and a return to PWM mode as the setpoint decreases, thereby preventing the closed-loop control circuit from swinging back and forth.
According to another embodiment of the present invention, the cost of control and the transition from PWM mode to permanently closed mode can be reduced by having a microprocessor control the functions of the voltage regulator and compensating stage.